Training

Verification

Functional verification with UVM, SVA assertions, formal and mixed-signal verification.

Topics in this area

  • Functional verification
  • UVM
  • Formal verification
  • SVA
  • Mixed-signal
Verification

Advanced Functional Verification I

UVM-based testbenches, sequences, hierarchical tests and functional coverage.

  • Functional verification
  • UVM
Duration
60 h
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Verification

Introduction to Formal Verification of Digital Circuits

Formal property verification, SVA convergence, counterexample analysis and formal coverage.

  • Formal verification
  • SVA
Duration
60 h
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Verification

Mixed-Signal Verification

Real-number modelling, EEnet and end-to-end verification of mixed-signal circuits.

  • Mixed-signal
Duration
60 h
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Course names are kept in English, as in the official catalogue.

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  2. Objective
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